Non-volatile memory systems, such as flash memory, have been widely adopted for use in consumer products. Flash memory may be found in different forms, for example in the form of a portable memory card that can be carried between host devices or as a solid state disk (SSD) embedded in a host device.
As the non-volatile memory cell scales to smaller dimensions with higher capacity per unit area, the cell endurance due to program and erase cycling, and disturbances (e.g. due to either read or program) may become more prominent. The defect level during the silicon process may become elevated as the cell dimension shrinks and process complexity increases. Accordingly, memory meeting high endurance requirements may be more difficult, which may further increase research and development costs for the technology scaling.
Memory blocks may be allocated to memory pools during format. The pools may identify a high endurance/high usage pool as compared with a lower endurance/low usage pool. In one embodiment, multi-level cell (MLC) memory may be the lower endurance/low usage pool while single level cell (SLC) blocks may be the high endurance/high usage pool. There may be pre-allocated blocks in the pools to compensate for grown defects. If either of the pools runs out of the pre-allocated blocks, the device or card may go into read only mode and may no longer be practically useful to the user.